In:
ECTI Transactions on Computer and Information Technology (ECTI-CIT), ECTI, Vol. 9, No. 1 ( 1970-01-01), p. 64-73
Abstract:
EDA has been proposed for a long time as a category of reliable software tools for designing electronic systems. Although some of them have been considered as powerful tools for asynchronous circuits, a prominent approach to cope with the biggest defect of synchronous circuits: clock distribution issue, researches in verifying the correctness of those circuits are still limited. Therefore, an enhanced version of PAiD, an EDA tool that has been developed at Ho Chi Minh City University of Technology (HCMUT), will be proposed in this work along with case studies. It will enable engineers not only design, synthesize asynchronous circuits but also verify them. Furthermore, a good strategy to improve the verifying performance is also discussed.
Type of Medium:
Online Resource
ISSN:
2286-9131
,
2286-9131
DOI:
10.37936/ecti-cit.201591
DOI:
10.37936/ecti-cit.201591.54405
Language:
Unknown
Publisher:
ECTI
Publication Date:
1970
detail.hit.zdb_id:
3069082-1
