In:
Applied Physics Express, IOP Publishing, Vol. 15, No. 6 ( 2022-06-01), p. 064005-
Abstract:
In this paper, we have demonstrated the high hole mobility in accumulation-mode Ge-on-insulator (AM-GeOI) pMOSFETs with back interface engineering by low-temperature H 2 annealing. The hole mobility of 227 cm 2 V −1 s −1 was obtained for the device annealed at 400 °C in H 2 ambient, which is 32% higher than that of the control device. A significant improvement in carrier mobility was attributed to two main factors: (1) the atomic rearrangement of Si and Ge in the intermixing layer located at the back interface, and (2) partial relaxation of tensile strain by thermal treatment.
Type of Medium:
Online Resource
ISSN:
1882-0778
,
1882-0786
DOI:
10.35848/1882-0786/ac6da2
Language:
Unknown
Publisher:
IOP Publishing
Publication Date:
2022
detail.hit.zdb_id:
2417569-9