In:
physica status solidi (RRL) – Rapid Research Letters, Wiley, Vol. 14, No. 10 ( 2020-10)
Abstract:
The gate‐induced electrical instability of SnO thin‐film transistors (TFTs) with SiO 2 and Al 2 O 3 /SiO 2 gate dielectric layers is evaluated. The hysteresis voltage ( V hy ) and threshold voltage ( V th ) in the transfer characteristics of SnO TFTs depend on the sweep range and rate of gate voltage ( V GS ). The TFT with an Al 2 O 3 /SiO 2 gate dielectric layer exhibit reduced V hy and stable V th compared with the device without an Al 2 O 3 layer. The introduction of an Al 2 O 3 layer between the SnO channel and the SiO 2 layer suppresses the electron and hole trapping at the channel/dielectric interface and contains mobile oxygen vacancies that counteract the hole trapping effect.
Type of Medium:
Online Resource
ISSN:
1862-6254
,
1862-6270
DOI:
10.1002/pssr.202000304
Language:
English
Publisher:
Wiley
Publication Date:
2020
detail.hit.zdb_id:
2260948-9
detail.hit.zdb_id:
2259465-6