Publication Date:
2016-01-20
Description:
Low-temperature atomic layer deposition (ALD) was employed to deposit Al 2 O 3 as a gate dielectric in amorphous In–Ga–Zn–O thin-film transistors fabricated at temperatures below 120 °C. The devices exhibited a negligible threshold voltage shift (ΔV T ) during negative bias stress, but a more pronounced ΔV T under positive bias stress with a characteristic turnaround behavior from a positive ΔV T to a negative ΔV T . This abnormal positive bias instability is explained using a two-process model, including both electron trapping and hydrogen release and migration. Electron trapping induces the initial positive ΔV T , which can be fitted using the stretched exponential function. The breakage of residual AlO-H bonds in low-temperature ALD Al 2 O 3 is triggered by the energetic channel electrons. The hydrogen atoms then diffuse toward the In–Ga–Zn–O channel and induce the negative ΔV T through electron doping with power-law time dependence. A rapid partial recovery of the negative ΔV T after stress is also observed during relaxation.
Print ISSN:
0003-6951
Electronic ISSN:
1077-3118
Topics:
Physics
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