In:
Japanese Journal of Applied Physics, IOP Publishing, Vol. 33, No. 6R ( 1994-06-01), p. 3628-
Abstract:
Several approaches to the heteroepitaxial growth of InP on (100)Si employing an electrochemically etched Si mesa, SiO 2 masks, and a maskless procedure were investigated with the objective of achieving area-selective InP integration into Si metal-oxide-semiconductor (Si-MOS) technology. Maskless InP/Si device layer growth by metal-organic vapour-phase epitaxy with good selectivity on a structured InP buffer layer, surrounded by oxide, was achieved. Undesired InP depositions were removed with an SiO 2 emulsion, spun on prior to InP growth. To study the effects on the Si-based electronics, p-metal-oxide-semiconductor field-effect tansistors (MOSFETs) were exposed to the various stages of the heteroepitaxial InP growth process. We have studied the influence of hydride atmospheres and thermal anneals on their electrical performance. A standard InP-on-(100)Si growth procedure was found to be acceptable for the MOS components, as demonstrated by a Schmitt-trigger laser-diode driver circuit.
Type of Medium:
Online Resource
ISSN:
0021-4922
,
1347-4065
DOI:
10.1143/JJAP.33.3628
Language:
Unknown
Publisher:
IOP Publishing
Publication Date:
1994
detail.hit.zdb_id:
218223-3
detail.hit.zdb_id:
797294-5
detail.hit.zdb_id:
2006801-3
detail.hit.zdb_id:
797295-7
Permalink