In:
Journal of Applied Physics, AIP Publishing, Vol. 93, No. 3 ( 2003-02-01), p. 1713-1717
Abstract:
To realize the full potential of high density embedded ferroelectric memory, ferroelectric film thickness must be scaled below 100 nm to ensure that the capacitor operating voltage is compatible with advanced, low voltage logic transistors. In this article, we describe recent progress in the preparation of sub-100 nm thick Pb(Zr,Ti)O3 (PZT) thin films by metalorganic chemical vapor deposition on 200 mm wafers using an industry-standard processing platform. Within the full range of thicknesses investigated, 134–52 nm, capacitor operating voltage scales linearly with film thickness, yielding 71 nm thick films with a switched polarization (Psw) of ∼40 μC/cm2 at 1.2 V. Below ∼50 nm, PZT surface roughness makes further thickness scaling difficult. With improved surface morphology, however, even lower operating voltages should be feasible.
Type of Medium:
Online Resource
ISSN:
0021-8979
,
1089-7550
Language:
English
Publisher:
AIP Publishing
Publication Date:
2003
detail.hit.zdb_id:
220641-9
detail.hit.zdb_id:
3112-4
detail.hit.zdb_id:
1476463-5
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