In:
ACM SIGARCH Computer Architecture News, Association for Computing Machinery (ACM), Vol. 32, No. 5 ( 2004-12), p. 97-106
Abstract:
This paper explores a new technique called coherence decoupling , which breaks a traditional cache coherence protocol into two protocols: a Speculative Cache Lookup (SCL) protocol and a safe, backing coherence protocol. The SCL protocol produces a speculative load value, typically from an invalid cache line, permitting the processor to compute with incoherent data. In parallel, the coherence protocol obtains the necessary coherence permissions and the correct value. Eventually, the speculative use of the incoherent data can be verified against the coherent data. Thus, coherence decoupling can greatly reduce --- if not eliminate --- the effects of false sharing. Furthermore, coherence decoupling can also reduce latencies incurred by true sharing. SCL protocols reduce those latencies by speculatively writing updates into invalid lines, thereby increasing the accuracy of speculation, without complicating the simple, underlying coherence protocol that guarantees correctness.The performance benefits of coherence decoupling are evaluated using a full-system simulator and a mix of commercial and scientific benchmarks. Our results show that 40% to 90% of all coherence misses can be speculated correctly, and therefore their latencies partially or fully hidden. This capability results in performance improvements ranging from 3% to over 16%, in most cases where the latencies of coherence misses have an effect on performance.
Type of Medium:
Online Resource
ISSN:
0163-5964
DOI:
10.1145/1037947.1024406
Language:
English
Publisher:
Association for Computing Machinery (ACM)
Publication Date:
2004
detail.hit.zdb_id:
2088489-8
detail.hit.zdb_id:
186012-4
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