In:
International Journal of Innovative Technology and Exploring Engineering, Blue Eyes Intelligence Engineering and Sciences Engineering and Sciences Publication - BEIESP, Vol. 9, No. 3 ( 2020-01-30), p. 2344-2347
Abstract:
The aim of this paper is to design simple and Effective digital control unit for a 64-bit processor core. Proposed idea is implemented in Spartan-III FPGA Architecture. Control unit (CU) directs the operation of the processor to get results. The function of CU is to fetch their instructions, examining them and execute the programs stored in the memory and executing them one after another in Main Memory. The Central Processing Unit (CPU) is the combination of Arithmetic and Logic Unit (ALU) and CU. The CPU receives information from several different elements; they are memory, control path and data path. Control Unit is required to produce the control signals for operating data path at each clock cycle. CU generates instructions to the memory, arithmetic/logic unit and input and output devices. The proposed control unit simulated in Xilinx and implemented in Spartan 3E , achieved less delay compared to existing approaches
Type of Medium:
Online Resource
ISSN:
2278-3075
DOI:
10.35940/ijitee.A4175.019320
Language:
Unknown
Publisher:
Blue Eyes Intelligence Engineering and Sciences Engineering and Sciences Publication - BEIESP
Publication Date:
2020
detail.hit.zdb_id:
2750974-6
Permalink