In:
Nature, Springer Science and Business Media LLC, Vol. 620, No. 7975 ( 2023-08-24), p. 768-775
Abstract:
Models of artificial intelligence (AI) that have billions of parameters can achieve high accuracy across a range of tasks 1,2 , but they exacerbate the poor energy efficiency of conventional general-purpose processors, such as graphics processing units or central processing units. Analog in-memory computing (analog-AI) 3–7 can provide better energy efficiency by performing matrix–vector multiplications in parallel on ‘memory tiles’. However, analog-AI has yet to demonstrate software-equivalent (SW eq ) accuracy on models that require many such tiles and efficient communication of neural-network activations between the tiles. Here we present an analog-AI chip that combines 35 million phase-change memory devices across 34 tiles, massively parallel inter-tile communication and analog, low-power peripheral circuitry that can achieve up to 12.4 tera-operations per second per watt (TOPS/W) chip-sustained performance. We demonstrate fully end-to-end SW eq accuracy for a small keyword-spotting network and near-SW eq accuracy on the much larger MLPerf 8 recurrent neural-network transducer (RNNT), with more than 45 million weights mapped onto more than 140 million phase-change memory devices across five chips.
Type of Medium:
Online Resource
ISSN:
0028-0836
,
1476-4687
DOI:
10.1038/s41586-023-06337-5
Language:
English
Publisher:
Springer Science and Business Media LLC
Publication Date:
2023
detail.hit.zdb_id:
120714-3
detail.hit.zdb_id:
1413423-8
SSG:
11
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