In:
ECS Transactions, The Electrochemical Society, Vol. 3, No. 7 ( 2006-10-20), p. 947-961
Abstract:
We have studied the integration process and the electrical properties of TiN/metal gate transistors with high k dielectrics for various strained substrates: Strained SOI, Strained SiGeOI, and Strained Ge. Substrate approaches enable (i)higher strain levels (additive with process induced strain), (ii)the co-integration of opposite strained layers for nMOS and PMOS, (iii)V T engineering for metal gates. Those features make the substrate approach a very promising solution for ultimate CMOS integration.
Type of Medium:
Online Resource
ISSN:
1938-5862
,
1938-6737
Language:
Unknown
Publisher:
The Electrochemical Society
Publication Date:
2006
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