In:
Semiconductor Science and Technology, IOP Publishing, Vol. 37, No. 2 ( 2022-02-01), p. 025017-
Abstract:
In this work, a two-step degradation phenomenon in D-mode Si 3 N 4 /AlGaN/GaN metal–insulator–semiconductor-high electron mobility transistors is discussed systematically. During off-state stress, threshold voltage shifts positively for a short duration, and is followed by a negative shift. In contrast, the off-state leakage continues to decrease throughout the entire stress. Results of varied measurement conditions indicate that carrier trapping at different regions dominates this phenomenon. It is interesting that under a large lateral electric field, electron–hole pairs are generated and will then be trapped at the gate dielectric layer. Furthermore, when increasing the stress temperature, impact ionization due to carriers from the gate electrode becomes more severe. Finally, devices with different gate insulator thicknesses are performed to verify the physical model of the degradation behavior.
Type of Medium:
Online Resource
ISSN:
0268-1242
,
1361-6641
DOI:
10.1088/1361-6641/ac4404
Language:
Unknown
Publisher:
IOP Publishing
Publication Date:
2022
detail.hit.zdb_id:
54647-1
detail.hit.zdb_id:
1361285-2
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