In:
International Symposium on Microelectronics, IMAPS - International Microelectronics Assembly and Packaging Society, Vol. 2021, No. 1 ( 2021-10-01), p. 000142-000148
Abstract:
Heterogeneous integration is considered as the key technology to create large, complex System in Package (SiP) assemblies of separately manufactured, smaller components. Proper control of the uniformity of each process step constitutes one of the main challenges during integration of the different components into a higher-level assembly. In this context, processes that create thick layers by electrochemical deposition are especially susceptible to variations across the substrate. Such processes include copper pillar and bump as well as tin-silver applications. Insufficient coplanarity of electrolytic copper would result in significant reliability issues or evolution of stress in the package. Upcoming hybrid bump designs with features of different dimensions pose additional challenges to the electrolytic copper and tin-silver processes. Purposeful adjustment of differences between the heights of pillars of different diameters may be required after the copper process step in order to obtain the best uniformity for the complete stack with tin-silver on top. In addition to coplanarity, the electrolytic process should allow modification shape of the individual pillar or bump. In this context, a versatile copper electrodeposition process will be discussed that allows adjustment to a broad variety of uniformity parameters and combinations thereof. In combination with suitable tin-silver deposition processes, this process is expected to significantly improve the reliability of copper pillars and bumps for advanced packaging applications.
Type of Medium:
Online Resource
ISSN:
1085-8024
DOI:
10.4071/1085-8024-2021.1.000142
Language:
English
Publisher:
IMAPS - International Microelectronics Assembly and Packaging Society
Publication Date:
2021
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