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  • Association for Computing Machinery (ACM)  (2)
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  • Association for Computing Machinery (ACM)  (2)
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  • 1
    Online Resource
    Online Resource
    Association for Computing Machinery (ACM) ; 2018
    In:  ACM SIGPLAN Notices Vol. 51, No. 11 ( 2018-07-19), p. 36-45
    In: ACM SIGPLAN Notices, Association for Computing Machinery (ACM), Vol. 51, No. 11 ( 2018-07-19), p. 36-45
    Abstract: Current memory reclamation mechanisms for highly-concurrent data structures present an awkward trade-off. Techniques such as epoch-based reclamation perform well when all threads are running on dedicated processors, but the delay or failure of a single thread will prevent any other thread from reclaiming memory. Alternatives such as hazard pointers are highly robust, but they are expensive because they require a large number of memory barriers. This paper proposes three novel ways to alleviate the costs of the memory barriers associated with hazard pointers and related techniques. These new proposals are backward-compatible with existing code that uses hazard pointers. They move the cost of memory management from the principal code path to the infrequent memory reclamation procedure, significantly reducing or eliminating memory barriers executed on the principal code path. These proposals include (1) exploiting the operating system's memory protection ability, (2) exploiting certain x86 hardware features to trigger memory barriers only when needed, and (3) a novel hardware-assisted mechanism, called a hazard lookaside buffer (HLB) that allows a reclaiming thread to query whether there are hazardous pointers that need to be flushed to memory. We evaluate our proposals using a few fundamental data structures (linked lists and skiplists) and libcuckoo, a recent high-throughput hash-table library, and show significant improvements over the hazard pointer technique.
    Type of Medium: Online Resource
    ISSN: 0362-1340 , 1558-1160
    Language: English
    Publisher: Association for Computing Machinery (ACM)
    Publication Date: 2018
    detail.hit.zdb_id: 2079194-X
    detail.hit.zdb_id: 282422-X
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  • 2
    Online Resource
    Online Resource
    Association for Computing Machinery (ACM) ; 2018
    In:  ACM Transactions on Architecture and Code Optimization Vol. 15, No. 1 ( 2018-03-31), p. 1-24
    In: ACM Transactions on Architecture and Code Optimization, Association for Computing Machinery (ACM), Vol. 15, No. 1 ( 2018-03-31), p. 1-24
    Abstract: Today’s hardware transactional memory (HTM) systems rely on existing coherence protocols, which implement a requester-wins strategy. This, in turn, leads to poor performance when transactions frequently conflict, causing them to resort to a non-speculative fallback path. Often, such a path severely limits parallelism. In this article, we propose very simple architectural changes to the existing requester-wins HTM implementations that enhance conflict resolution between hardware transactions and thus improve their parallelism. Our idea is compatible with existing HTM systems, requires no changes to target applications that employ traditional lock synchronization, and is shown to provide robust performance benefits.
    Type of Medium: Online Resource
    ISSN: 1544-3566 , 1544-3973
    Language: English
    Publisher: Association for Computing Machinery (ACM)
    Publication Date: 2018
    detail.hit.zdb_id: 2142607-7
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