In:
Japanese Journal of Applied Physics, IOP Publishing, Vol. 20, No. S1 ( 1981-01-01), p. 155-
Abstract:
We have developed a new bipolar process technology, called SST. The emitter region, base p region, base p + region, base p + polysilicon electrode and emitter contact window of NPN transistor are formed by one mask photolithography process. The transistor active regions are all self-aligned. Therefore, small-size transistors can be realized and high performance is achieved by the decreased collector-base junction capacitance. A new bipolar integrated circuit using SST gave a 63 ps/gate propagation delay time and 0.043 pJ/gate speed-power product.
Type of Medium:
Online Resource
ISSN:
0021-4922
,
1347-4065
DOI:
10.7567/JJAPS.20S1.155
Language:
Unknown
Publisher:
IOP Publishing
Publication Date:
1981
detail.hit.zdb_id:
218223-3
detail.hit.zdb_id:
797294-5
detail.hit.zdb_id:
2006801-3
detail.hit.zdb_id:
797295-7
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