In:
Japanese Journal of Applied Physics, IOP Publishing, Vol. 36, No. 7R ( 1997-07-01), p. 4278-
Abstract:
A high performance top-gate thin film transistor (TFT) has been fabricated using an as-deposited polycrystalline silicon (poly-Si) film by ultrahigh-vacuum chemical vapor deposition (UHV/CVD) followed by chemical mechanical polishing (CMP). In this process, due to the ultraclean environment and very low-pressure deposition of UHV/CVD, high-quality poly-Si films can be obtained and no long-term or post-recrystallization in channel films is needed. Maximum field effect mobilities of 58 cm 2 /V·s and 98 cm 2 /V·s for p- and n-channel TFTs, respectively, an ON/OFF current ratio of 1.1×10 7 for both p- and n-channels, and threshold voltages of -0.54 V for p-channel and 0.36 V for n-channel devices, respectively, are achieved. Finally, an analytical model of poly-Si TFTs was used to simulate the gate-voltage-dependent activation energy on the threshold and above the threshold regions and showed good agreement.
Type of Medium:
Online Resource
ISSN:
0021-4922
,
1347-4065
DOI:
10.1143/JJAP.36.4278
Language:
Unknown
Publisher:
IOP Publishing
Publication Date:
1997
detail.hit.zdb_id:
218223-3
detail.hit.zdb_id:
797294-5
detail.hit.zdb_id:
2006801-3
detail.hit.zdb_id:
797295-7
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