In:
ECS Transactions, The Electrochemical Society, Vol. 16, No. 10 ( 2008-10-03), p. 1001-1013
Abstract:
In this paper we demonstrate the successful integration of in-situ doped embedded Si:C stressors epitaxially grown in the source and drain areas of nMOS devices using a novel Cyclic Deposition Etch (CDE) process. These layers have substitutional C content ranging between 1% and 2% with potential of achieving even higher substitutional carbon concentration. Another distinctive feature of this process is that it allows for high in-situ P doping for ease of integration within a CMOS platform. We demonstrate superior performance of strained nMOS devices with embedded Si:C showing up to 12.5% on-state current improvement over the unstrained reference process. We report on material characterization results of embedded Si:C stressors, in particular, strain retention properties as a function of subsequent post-epitaxy processing.
Type of Medium:
Online Resource
ISSN:
1938-5862
,
1938-6737
Language:
Unknown
Publisher:
The Electrochemical Society
Publication Date:
2008
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