In:
Japanese Journal of Applied Physics, IOP Publishing, Vol. 35, No. 2S ( 1996-02-01), p. 865-
Abstract:
A 0.25 µm complementary metal oxide semiconductor field effect transistor (CMOSFET) has been developed using halo implantation for 1 Gbit dynamic random access memory (DRAM). This technology features a source/drain implantation followed by a halo implantation with an inclined angle after formation of oxide sidewall spacer. The halo implantation is performed without additional implantation masks. Dopants formed by the halo implantation act as the punchthrough stopper that surrounds the lightly doped drain (LDD) implantation region. As a result, the short-channel effect (SCE) of the halo CMOSFET is dramatically suppressed as compared with that of the conventional CMOSFET and the breakdown voltage between drain and source (BVds) margin is markedly improved more than 0.05 µm for n-channel metal oxide semiconductor field effect transistor (NMOSFET) and 0.12 µm for p-channel metal oxide semiconductor field effect transistor (PMOSFET).
Type of Medium:
Online Resource
ISSN:
0021-4922
,
1347-4065
Language:
Unknown
Publisher:
IOP Publishing
Publication Date:
1996
detail.hit.zdb_id:
218223-3
detail.hit.zdb_id:
797294-5
detail.hit.zdb_id:
2006801-3
detail.hit.zdb_id:
797295-7
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