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  • Lundgren, Per  (7)
  • 1
    Online Resource
    Online Resource
    Elsevier BV ; 2002
    In:  Solid-State Electronics Vol. 46, No. 7 ( 2002-7), p. 991-995
    In: Solid-State Electronics, Elsevier BV, Vol. 46, No. 7 ( 2002-7), p. 991-995
    Type of Medium: Online Resource
    ISSN: 0038-1101
    Language: English
    Publisher: Elsevier BV
    Publication Date: 2002
    detail.hit.zdb_id: 204574-6
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  • 2
    Online Resource
    Online Resource
    AIP Publishing ; 2003
    In:  Journal of Applied Physics Vol. 93, No. 6 ( 2003-03-15), p. 3545-3552
    In: Journal of Applied Physics, AIP Publishing, Vol. 93, No. 6 ( 2003-03-15), p. 3545-3552
    Abstract: We investigate the effects of silicon cap layer thinning on channel carrier confinement in silicon/strained silicon-germanium (Si/SiGe) metal–oxide–semiconductor (MOS) structures. The silicon cap thickness is shown to have a critical influence on the induced parasitic channel in the silicon cap, which lowers the transconductance value of the buried SiGe channel in hole carrier channel p metal–oxide–semiconductor field-effect transistor devices. This can have serious consequences on future implementation of SiGe ultrashort channel devices where gate induced parasitic channel and short channel effects can be pronounced. An exact methodology is devised for consumption of silicon cap layer using a modified Radio Corporation of America surface standard clean self-terminating chemical oxide and rapid thermal oxide growth. This provides (i) precise control over the silicon cap and thermal oxide thickness and (ii) a limit on the amount of thermal budget induced strain relaxation in the buried SiGe layer. The threshold voltages for inversion of carriers at the SiO2/Si and the Si/SiGe interfaces are extracted as functions of Si cap thickness. A transition from dual to single channel operation in MOS devices at room temperature on thinning the silicon cap layer is observed with capacitance–voltage measurements. Cross-section transmission electron microscopy and secondary ion mass spectroscopy techniques are used to calibrate and support the developed methodology for Si cap layer etch control and the effect of Ge species at the oxide–heterostructure interface. There is a high fixed charge density, which indicates Ge pileup at the SiO2/SiGe interface. Our analysis suggests that about 1 nm of silicon cap retention is necessary to minimize the gate induced parasitic channel and to decouple the oxide interface trap influence on the channel carriers in the SiGe.
    Type of Medium: Online Resource
    ISSN: 0021-8979 , 1089-7550
    Language: English
    Publisher: AIP Publishing
    Publication Date: 2003
    detail.hit.zdb_id: 3112-4
    detail.hit.zdb_id: 1476463-5
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  • 3
    Online Resource
    Online Resource
    AIP Publishing ; 2005
    In:  Applied Physics Letters Vol. 87, No. 22 ( 2005-11-28)
    In: Applied Physics Letters, AIP Publishing, Vol. 87, No. 22 ( 2005-11-28)
    Abstract: Silicon nanogaps are contact structures for connecting organic molecules. An insulating layer is removed by etching, and this dramatically increases the current levels and the noise, which closely resembles a 1∕f law and scales with the square of the current. After etching, the noise level at 30Hz and 10nA is in the order of 10−21A2∕Hz, which is more than two orders of magnitude larger than before etching. We model the noisy behavior by several percolation paths in parallel at the etched surface between the electrodes, and compare it with soft breakdown in thin oxide.
    Type of Medium: Online Resource
    ISSN: 0003-6951 , 1077-3118
    RVK:
    Language: English
    Publisher: AIP Publishing
    Publication Date: 2005
    detail.hit.zdb_id: 211245-0
    detail.hit.zdb_id: 1469436-0
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  • 4
    Online Resource
    Online Resource
    Springer Science and Business Media LLC ; 2001
    In:  MRS Proceedings Vol. 679 ( 2001)
    In: MRS Proceedings, Springer Science and Business Media LLC, Vol. 679 ( 2001)
    Abstract: Simulations have been made to analyze the use of molecular resonant tunneling diodes for local refresh of DRAM (Dynamic Random Access Memory) cells. Local refresh can be provided by a latch consisting of a pair of resonant tunneling diodes connected to the storage capacitor of the cell. Such a solution would significantly reduce the standby power consumption of the DRAM cell. We have compared the requirements on the resonant tunneling diodes for proper refresh operation with the electrical properties of published molecules with resonant IV-curves. The simulations show that no molecules with resonant electrical properties published so far in the literature have properties making them useful for this particular application. This is true also for low temperature operation. The issues of maximum tolerable series resistance and of maximum tolerable fluctuations in the number of attached molecules have also been addressed. Our results show that the focus for development of molecules with resonant electrical properties should be to find molecules with resonance for lower applied voltages and lower current levels than the molecules published so far. If the synthesis of new molecules with attractive properties is successful the merging of silicon technology and molecular electronics, for instance for new generations of DRAM cells, is a realistic future path of microelectronics.
    Type of Medium: Online Resource
    ISSN: 0272-9172 , 1946-4274
    Language: English
    Publisher: Springer Science and Business Media LLC
    Publication Date: 2001
    detail.hit.zdb_id: 605289-7
    detail.hit.zdb_id: 2451008-7
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  • 5
    Online Resource
    Online Resource
    Elsevier BV ; 2000
    In:  Solid-State Electronics Vol. 44, No. 12 ( 2000-12), p. 2247-2252
    In: Solid-State Electronics, Elsevier BV, Vol. 44, No. 12 ( 2000-12), p. 2247-2252
    Type of Medium: Online Resource
    ISSN: 0038-1101
    Language: English
    Publisher: Elsevier BV
    Publication Date: 2000
    detail.hit.zdb_id: 204574-6
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  • 6
    Online Resource
    Online Resource
    IOP Publishing ; 2005
    In:  Nanotechnology Vol. 16, No. 10 ( 2005-10-01), p. 2197-2202
    In: Nanotechnology, IOP Publishing, Vol. 16, No. 10 ( 2005-10-01), p. 2197-2202
    Type of Medium: Online Resource
    ISSN: 0957-4484 , 1361-6528
    Language: Unknown
    Publisher: IOP Publishing
    Publication Date: 2005
    detail.hit.zdb_id: 1054118-4
    detail.hit.zdb_id: 1362365-5
    SSG: 11
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  • 7
    Online Resource
    Online Resource
    AIP Publishing ; 2011
    In:  Journal of Applied Physics Vol. 110, No. 2 ( 2011-07-15)
    In: Journal of Applied Physics, AIP Publishing, Vol. 110, No. 2 ( 2011-07-15)
    Abstract: This paper gives an assessment of vertically aligned carbon based varactors and validates their potential for future applications. The varactors discussed here are nanoelectromechanical devices which are based on either vertically aligned carbon nanofibers or vertically aligned carbon nanotube arrays. A generic analytical model for parallel plate nanoelectromechanical varactors based on previous works is developed and is used to formulate a universal expression for their voltage-capacitance relation. Specific expressions for the nanofiber based and the nanotube based varactors are then derived separately from the generic model. This paper also provides a detailed review on the fabrication of carbon based varactors and pays special attention to the challenges in realizing such devices. Finally, the performance of the carbon based varactor is assessed in accordance with four criteria: the static capacitance, the tuning ratio, the quality factor, and the operating voltage. Although the reported performance is still far inferior to other varactor technologies, our prognosis which stems from the analytical model shows a promise of a high quality factor as well as a potential for high power handling for carbon based varactors.
    Type of Medium: Online Resource
    ISSN: 0021-8979 , 1089-7550
    Language: English
    Publisher: AIP Publishing
    Publication Date: 2011
    detail.hit.zdb_id: 3112-4
    detail.hit.zdb_id: 1476463-5
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